One Wire, Four Decades: How GALs, FPGAs, and Custom Chips Split the Same Job

Sun, 06 Sep 2026 00:00:00 GMT

A wire that says “you”

It is 1985, and there is an engineer at a workbench losing an afternoon to the least glamorous problem in computing.

Her board is simple enough to describe in a sentence. A processor in the middle. A memory chip on the left holding the program. Another on the right holding whatever the program is currently thinking about. Wires between them, in parallel, so that when the processor announces an address, both chips hear it at exactly the same moment.

Which is the problem. Both of them heard it. Only one of them was being spoken to.

So somebody has to sit between the processor and the memory and tap the correct chip on the shoulder. The rule is not complicated. She could say it out loud in one breath: if the address is in the upper half of memory, and the processor is asking to read, wake up the chip on the left.

One sentence. One signal. That’s the entire job.

And in 1985, building that one sentence costs her a corner of the board.

The sea of little chips

Look at a circuit board from that era and you’ll notice something odd once you know to look for it. Past the big, important, expensive components — the processor, the memory, the thing the board is famously for — there is a scattering of small identical black rectangles with fourteen legs each. A dozen of them. Sometimes thirty.

None of them do anything you would put on the box. They are the 7400 series, and each one contains a few of the simplest possible operations. One chip holds four AND gates. Another holds four ORs. Another holds six inverters, whose entire life’s work is turning a high signal into a low one.

To build her one-sentence rule, she needs a few gates from this chip and a couple from that one and an inverter from a third. Every one of them is a physical object. Each needs a footprint on the board, a path routed to it, solder on twenty-eight joints, and a small continuous sip of power for as long as the machine is switched on. Engineers called this stuff glue logic — the connective tissue holding the interesting parts together — and it is telling that the name is faintly dismissive. Nobody was proud of it. It was overhead you paid because the alternative was nothing.

The real cost, though, wasn’t board space. It was what happened when she got the sentence wrong.

Because the sentence is now made of copper. It exists as a physical path etched into the board, and changing it means changing the board. So she takes a hobby knife, finds the trace that shouldn’t be there, and cuts it — a small deliberate act of vandalism against something that took six weeks and a factory to produce. Then she solders a wire across the top of the board to the place the signal should have gone instead. In the trade this is a bodge wire, and a board carrying two or three of them looks exactly like what it is: a patient, stitched up, walking around with the scar showing.

Every logic mistake was a physical wound. That is the world the next chip walked into.

The chip that hasn’t decided yet

It looks like nothing. Twenty legs, a black body, about the size of your thumbnail. Today you can buy one for less than a dollar.

Inside a GAL — Generic Array Logic — there is a grid of connections, and at every intersection of that grid, a fuse. Not blown, not set, not anything yet. The chip leaves the factory having decided nothing at all about what it does. It is a page of blank staff paper. Whether it ends up decoding addresses or generating a clock or sitting between two chips translating one protocol to another is not a fact about the chip. It’s a fact about what you tell it.

And you tell it in text. Not with a soldering iron — with a line that looks like this:

/RAMS = /MREQ * A15

Which is the same sentence she said out loud at the workbench, written in a form a machine can consume. Pull the RAM’s select line low when the processor is talking to memory and the top address bit is high. You compile it, push the resulting pattern into the chip through a programmer, drop it in its socket, and the sentence is now true.

The chip count falls off a cliff. One builder restoring a 68000 machine replaced his entire discrete address decoder with a single GAL and deleted eight chips from the board — space, power, solder joints, and a bug in the original decoder, all gone at once. A PDP-11 single-board project found six TTL chips simply never needed to be installed. And the GALs were faster than the parts they replaced, propagating a signal in about fifteen nanoseconds where the older logic dawdled.

But the number that mattered wasn’t eight. It was this: the fuses are erasable.

Get the logic wrong now and there is no knife. There is no wire soldered across the board, no scar, no six-week wait. You pull the chip, rewrite one line, reprogram it, and put it back. The mistake costs seconds.

Something quietly enormous happened there, and it’s worth naming plainly, because everything that follows is a variation on it: the shape of the hardware stopped being decided at the factory. It got postponed, and handed to the person holding the board.

That’s it. That’s the whole idea. Everything after this is the same idea with more zeroes.

The same idea, grown until it’s frightening

So postpone more.

Don’t stop at one small sentence of logic. Put down thousands of tiny blank logic elements, arrange them in a grid across the whole chip, and — this is the part that matters — leave the wiring between them undecided too. Not just blank gates. A blank city, with blank streets.

That’s an FPGA: a Field-Programmable Gate Array. Field-programmable, meaning the decision happens out in the world, after the chip has been manufactured, packaged, sold, shipped, and soldered down. Instead of the GAL’s handful of fuses, there are millions of switches, and they’re set by a file — a bitstream — loaded in at power-up from a small flash chip sitting next to it.

Which produces a genuinely strange property. Cut the power and an FPGA forgets everything. It reverts to a blank field. Every single time the machine turns on, the chip has to be told again what it is.

And the thing you can tell it is no longer one sentence. It’s an entire signal processing pipeline, or a video encoder, or a network switch, or — routinely — a working processor, because a processor is only a very large arrangement of gates and there is nothing stopping you from arranging them.

The reason anyone pays for this isn’t size, though. It’s shape. A normal processor is brilliant and fundamentally single-file: it does one thing, then the next thing, then the next, very fast. An FPGA doesn’t do things in order, because it isn’t running instructions. It has been physically arranged into the answer. Every part of it operates at once, because every part of it is a separate piece of circuitry that exists simultaneously. When you need to do the same operation to ten thousand incoming values in the same instant, you don’t want a faster reader. You want ten thousand hands.

A concrete case, 140 million miles away

In February 2021, NASA’s Perseverance rover fell through the Martian atmosphere with a camera pointed at the ground, comparing what it saw against a map stored onboard, working out where it was and whether the ground below was survivable. It had seconds. Nobody on Earth could help — the round-trip radio delay is longer than the entire descent.

The rover’s main flight computer, a radiation-hardened processor built to survive space rather than to be quick, needs about 180 seconds to process a pair of stereo images. The FPGA card sitting beside it does the same work in about 1.5 seconds. That gap is the difference between a landing system and a very expensive rock.

Then comes the part that makes the whole idea click.

After the rover was safely down, the descent was over. The landing logic had done its job and would never be needed again. So they reprogrammed the chip. The same physical silicon that had guided Perseverance through the sky was rearranged, on the surface of another planet, into a system that helps it look at the terrain ahead and decide where to drive.

One chip. Two completely different machines. The second one didn’t exist until after the first one had finished.

That is the workbench engineer’s erasable fuse, carried to its absolute conclusion.

And yet the phone in your pocket does none of this

Here’s the turn.

Take that same humble job — wake up the right chip — and go looking for it inside a modern phone. It’s in there. Some equivalent of that 1985 sentence is being evaluated billions of times a second in the device you’re probably reading this on.

It is not in a GAL. It is not in an FPGA. It is etched permanently into a custom chip, decided once, at a factory, and it will never change for as long as the phone exists.

That chip is an ASIC — an Application-Specific Integrated Circuit — and by every measure we’ve used so far it’s the worst option. Zero flexibility. A logic error isn’t a bodge wire or a rewrite, it’s a recall. The design is frozen years before the product ships.

And it costs about two dollars to make.

So why isn’t everything an ASIC? If permanent silicon is that cheap, why did anyone ever bother with a chip that forgets itself every time you unplug it?

The number hiding behind the two dollars

Because the two dollars is only the price of the next one.

Before a single ASIC exists, someone has to design it, verify it exhaustively, license the building blocks, and — the brutal part — manufacture a set of photomasks, the physical stencils used to print the pattern onto silicon. At a modern process node a mask set alone runs somewhere in the region of ten to forty million dollars. Full design programs at the leading edge get quoted in the hundreds of millions, though it’s worth saying honestly that those headline figures are contested; several chip startups have reportedly gotten advanced-node designs done for a small fraction of them. The exact number is genuinely arguable. The shape of it isn’t.

Engineers have a name for money like this, and it’s the most useful piece of vocabulary in this entire post: NRE, for Non-Recurring Engineering. It’s the cost you pay once, before anything exists, regardless of whether you go on to build one unit or a billion.

The rest of the industry stops being confusing the moment you hold NRE and per-unit cost in your head at the same time:

	Cost before unit one	Cost per unit	Flexible after shipping?
Loose gates / GAL	Essentially nothing	Cents	Yes, trivially
FPGA	Engineering time only	$20 to $20,000 — forever	Yes, even remotely
Custom silicon (ASIC)	Millions to hundreds of millions	A couple of dollars	No

Now do the arithmetic, and watch it decide things you thought were engineering decisions.

Spend fifty million dollars in NRE and ship two hundred million phones, and you’ve added twenty-five cents to each one. You’d be irrational not to. Every dollar you shave off the per-unit cost gets multiplied by two hundred million, and the upfront number disappears into the noise.

Now spend that same fifty million and ship forty units. You’ve added more than a million dollars to each one. And you’ve bought yourself a permanent, unfixable design, in a product line that will be superseded before you’ve recovered the cost.

Forty is not a hypothetical. In 2024, ASML — the company with an effective monopoly on the machines that print the world’s most advanced chips — sold forty-four of its extreme-ultraviolet lithography systems. The newest generation costs roughly $380 million each. These are arguably the most complex machines humans have ever assembled, they are the bottleneck of the entire semiconductor industry, and they are built in quantities you could park in a supermarket lot.

At that volume, a ten-thousand-dollar flexible chip isn’t extravagant. It’s a rounding error against the machine it lives in — and it can be improved by a firmware update instead of a factory.

Which lands somewhere genuinely counterintuitive: some of the most expensive, most advanced hardware on Earth contains less custom silicon than a mid-range phone. Not because the people building it couldn’t. Because they did the multiplication.

The curve you’ve already been standing on

So the four bodies of that one small signal were never four steps of progress, with the newest being best. They’re four correct answers to four different questions, and the question was never what’s the most sophisticated way to do this? It was always how many times is this going to get built?

Volume decides the silicon. Not cleverness. Not budget, even. Volume.

And here’s the part worth carrying out of the workshop, because this curve does not stay in hardware.

Every time you decide whether to spend a morning automating something or just do it by hand, you’re pricing NRE against volume. Automating is the ASIC: expensive once, then nearly free forever. Doing it by hand is the FPGA — no setup cost, and you pay again every single time. If the task recurs daily for two years, you’d be foolish not to build the tool. If it happens twice, building the tool is the expensive mistake, no matter how elegant it would have been.

Rent infrastructure or run your own. Pull in the framework or hand-roll the thing you actually need. Write the abstraction now or copy-paste it three more times and see if a pattern emerges. Same curve. Same two variables. Every time.

The reason people get these decisions wrong usually isn’t that they can’t do the arithmetic. It’s that they never noticed there was arithmetic to do — that upfront cost and repeated cost are different animals, and that the crossover between them is a real point you could actually locate if you sat down and estimated the volume.

The engineer in 1985 couldn’t have known any of this yet. She just wanted one wire to say “you” to the right chip, and she was willing to cut her own board open to make it happen.

Forty years later, the wire still says the same thing. Only the price of changing its mind has moved.

Disclaimer: Written by Human, improved using AI where applicable.

Gal on Shane's Personal Blog